The electrical current characteristics of thermally annealed Co/anodic oxide layer/n-GaAs sandwich structures
dc.contributor.author | Yildirm, N. | |
dc.contributor.author | Turut, A. | |
dc.contributor.author | Biber, M. | |
dc.contributor.author | Saglam, M. | |
dc.contributor.author | Guzeldir, B. | |
dc.date.accessioned | 2024-02-23T14:26:25Z | |
dc.date.available | 2024-02-23T14:26:25Z | |
dc.date.issued | 2019 | |
dc.department | NEÜ | en_US |
dc.description.abstract | The Co/anodic oxide layer/n-GaAs MOS structures have been fabricated by us. The MOS structures have shown an excellent rectifying behavior before and after thermal annealing of 500 degrees C for 2 min. It has been stated in the literature that the thermal annealing at a relatively low-temperature can improve the quality and performance of the anodic MOS structure. The current-voltage (I-V) measurements of the annealed MOS structure have been attempted in the measurement temperature range 60-320 K with the steps of 20 K. The I-V plot at 300 K has given the diode parameter values as barrier height (Phi(b0) = 0.96 eV and ideality factor n = 1.22, diode series resistance R-s = 124 Omega for the annealed sample, and (Phi(b0) = 0.87 eV and n = 2.11, R-s = 204 Omega for the nonannealed structure. A mean tunneling potential barrier value of 0.59 eV for the anodic oxide layer at the Co/n-GaAs interface has been calculated from the current- voltage-temperature curves. Furthermore, Phi(b0)(T) versus (2kT)(-1) curve has followed a double Gaussian distribution (GD) of the barrier heights. It has been stated that the double GD may be originated from the presence of the surface patches and phases arisen at the anodic oxide layer/n-GaAs interface. | en_US |
dc.description.sponsorship | Turkish Scientific and Technological Research Council of Turkey (TUBITAK) [105T487]; Ataturk University [BAP 2006/51] | en_US |
dc.description.sponsorship | This work was supported by The Turkish Scientific and Technological Research Council of Turkey (TUBITAK) (Project No. 105T487) and Ataturk University (Project No. BAP 2006/51). The authors wish to thank TUBITAK and Ataturk University. | en_US |
dc.identifier.doi | 10.1142/S0217979219502321 | |
dc.identifier.issn | 0217-9792 | |
dc.identifier.issn | 1793-6578 | |
dc.identifier.issue | 21 | en_US |
dc.identifier.scopus | 2-s2.0-85072092140 | en_US |
dc.identifier.scopusquality | Q3 | en_US |
dc.identifier.uri | https://doi.org/10.1142/S0217979219502321 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12452/14169 | |
dc.identifier.volume | 33 | en_US |
dc.identifier.wos | WOS:000487187900004 | en_US |
dc.identifier.wosquality | Q4 | en_US |
dc.indekslendigikaynak | Web of Science | en_US |
dc.indekslendigikaynak | Scopus | en_US |
dc.language.iso | en | en_US |
dc.publisher | World Scientific Publ Co Pte Ltd | en_US |
dc.relation.ispartof | International Journal Of Modern Physics B | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Metal/Oxide Layer/Semiconductor (Mos) Structures | en_US |
dc.subject | Anodic Oxidation | en_US |
dc.subject | Anodization Process | en_US |
dc.subject | Gaas Semiconductor | en_US |
dc.subject | Thermal Annealing | en_US |
dc.subject | The Current-Voltage Characteristics Of Mos Structures | en_US |
dc.title | The electrical current characteristics of thermally annealed Co/anodic oxide layer/n-GaAs sandwich structures | en_US |
dc.type | Article | en_US |